Full-chip Power-supply Noise: the Effect of On-chip Power-rail Inductance

نویسنده

  • C. W. FOK
چکیده

The importance of on-chip power-rail inductance in generating delta-I power-supply noise is examined in this paper using systematic circuit simulation of the complete integratedcircuit power net. This source of noise is compared to the resistive IR drop in the net, and to the delta-I noise due to both high-inductanceand low-inductance-bonding packages. Results are presented for a typical on-chip power net in 0.18μm CMOS technology, and it is demonstrated that the inductance of this on-chip power net is the dominant contributor to the full-chip power-supply noise. The simultaneous switching events which produce the triggering current transients for the delta-I noise are taken to arise from core-logic switching; the mitigating, de-coupling role of the capacitance of non-switching gates within the core-logic block is considered.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Low Dropout Based Noise Minimization of Active Mode Power Gated Circuit

Power gating technique reduces leakage power in the circuit. However, power gating leads to large voltage fluctuation on the power rail during power gating mode to active mode due to the package inductance in the Printed Circuit Board. This voltage fluctuation may cause unwanted transitions in neighboring circuits. In this work, a power gating architecture is developed for minimizing power in a...

متن کامل

Impact of On-Chip Inductance on Power Supply Integrity

Based on product related scenarios, the impact of on-chip inductance on power supply integrity is analyzed. The impact of varying current profiles is shown to be minimal. In a regular power grid with regular bump connections, the impact of on-chip inductance on the cycle average of the supply voltage can be neglected, even for a worst case estimation of on-chip inductance. Whereas, the maximum ...

متن کامل

Reevaluating Fast Dual-Voltage Power Rail Switching Circuitry

Several recent papers have been published proposing the use of dual-voltage rails and fast switching circuitry to address bottlenecks or overcome process variation in nearthreshold computing systems. The published results yield boosting transition times of 7-10ns, which, in some cases, is needed for the architectural contributions to be justified. However, the analysis of these circuits assumed...

متن کامل

Analyzing Internal-Switching Induced Simultaneous Switching Noise

The internal-switching induced simultaneous switching noise (SSN) is studied in the paper. Unlike ground bounce caused by driving off-chip loading, both power-rail and ground-rail wire/pin impedances are important in evaluating internal SSN, and the double negative feedback mechanism should be accounted for. Based on the lumped-model analysis and taking into account the parasitic effects and ve...

متن کامل

Delay Uncertainty Due to On-chip Simultaneous Switching Noise in High Performance Cmos Integrated Circuits

On-chip parasitic inductance inherent to the power supply rails has become significant in high speed digital circuits. Therefore, current surges result in voltage fluctuations within the power distribution networks, creating delay uncertainty. On-chip simultaneous switching noise should therefore be considered when estimating the propagation delay of a CMOS logic gate in high speed synchronous ...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2002